A digital (or logic) inverter is a 2-connection logic gate which takes an input and outputs the opposite logic level. The schematic diagram symbol for an inverter is a triangle with the output coming from one corner with a small circle between the corner and the line representing the output wire, and the input shown connected to the center of the opposite side. It may be in any orientation.
The truth table of the digital inverter is:
In | Out
0 | 1
1 | 0
Digital inverters are designed to have a minimal transit time (delay from arrival of change of input to change of output, and transition time (change from one state to the other). The simplest form is a common - emitter transistor (or common drain FET. CMOS inverters use two Metal-Oxide-Semiconductor (MOS) FETs, one P-channel, one N-channel, in a “totem pole” arrangement. One MOSFET is turned on and the other off by the same input, and the gate only draws current during state-changes, resulting in very low current draw.